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This web site is under development.

Here, you can download the schematic and pcb layout design files as well as some example VHDL and Verllog FPGA design files.

Here are the current versions of the schematic and pcb layout files. They are subject to change until the boards are released.
The schematics are in smart pdf format, so they are rather large. Please be patient if you have a slow internet connection.


Note: These designs are distributed under a Creative Commons license Attribution-ShareAlike 3.0
This information is supplied with NO WARRANTY OF ANY KIND. It may contain errors and it may be incomplete. You are free to use the information as you wish but we accept no responsibility for it. By downloading this information, you have agreed to these terms and conditions.

Here is the current parts list, in Excel format:

BOM, released version 1

And here are the current Gerber and drill files used for pcb manufacture.

Gerber and drill files

Here is the constraint file for the pre-loaded FPGA code. It is suitable for the Lattice Diamond software.

Constraint LPF file

Here is an auxilliary file which you may need:


Here is the Verilog file for the pre-loaded FPGA code. It is based on the Lattice Diamond example RD1124. The easiest way to recompile the code is to first obtain a copy of RD1124 from the Lattice Diamond web site, then replace the constraint and Verilog files.

Verilog file

Here are the files used for a simple stand-alone test of the board. When loaded, four of the LEDs should light. The fifth LED should light when one button is pressed, and one of the other LEDs should go off when the other button is pressed. This is almost the simplest function which can be achieved, so it's the equivalent of a "Hello World!" program.

"Hello World" files